Ph.D. Studentship Logic Synthesis for Self-Timed Systems
School of Computer Science
Project to start: Sept 2006
Closing date for applications: *30th June 2006*
Process variation makes timing closure complex in DSM CMOS technologies. Consequently, synchronous circuits are often clocked at only 50% of their potential maximum operating speed. Self-timed circuits are data-driven and not controlled by external timing signals, making them tolerant to large variations in the arrival times of inputs. Datapaths are encoded so that function completion is signalled by the generation of a valid output value. Several EDA tools exist to synthesise self-timed control circuits, but datapath synthesis methods are less developed.
This PhD will investigate issues in mapping technology-independent circuits into defined cell libraries for different self-timed methodologies and will be closely aligned with the objectives of an EPSRC funded project, SEDATE Candidates should hold or expect to receive a 2.1 degree or M.Sc. in Computer Science, Electronic Engineering or a similar subject.
The studentship covers tuition fees at the UK/EU rate for the three years of the PhD programme and includes an annual maintenance grant at enhanced EPSRC rates (�12,000 for 2005/06). The School of Computer Science also provides opportunities for research students to supplement their income by undertaking laboratory demonstrating and other teaching support work. Non EU students are eligible.
For further information contact the project supervisor, Dr Doug Edwards:
Douglas.Edwards@manchester.ac.uk or see:
http://www.cs.manchester.ac.uk/apt/projects/sedate/SedateStudentship.php and also http://www.cs.manchester.ac.uk/apt/projects/sedate/
Details of how to apply for this post are available online (including an online copy of the application form) at:
http://www.cs.manchester.ac.uk/Study_subweb/PhDWeb/PhDApplication.php
Please ensure that you mark clearly on your application form, under the 'Proposed Area of Research' section, that you are applying for 'Asynchronous Synthesis' with Dr. Doug Edwards as supervisor, or your application may not be considered for this studentship.
School of Computer Science
Project to start: Sept 2006
Closing date for applications: *30th June 2006*
Process variation makes timing closure complex in DSM CMOS technologies. Consequently, synchronous circuits are often clocked at only 50% of their potential maximum operating speed. Self-timed circuits are data-driven and not controlled by external timing signals, making them tolerant to large variations in the arrival times of inputs. Datapaths are encoded so that function completion is signalled by the generation of a valid output value. Several EDA tools exist to synthesise self-timed control circuits, but datapath synthesis methods are less developed.
This PhD will investigate issues in mapping technology-independent circuits into defined cell libraries for different self-timed methodologies and will be closely aligned with the objectives of an EPSRC funded project, SEDATE Candidates should hold or expect to receive a 2.1 degree or M.Sc. in Computer Science, Electronic Engineering or a similar subject.
The studentship covers tuition fees at the UK/EU rate for the three years of the PhD programme and includes an annual maintenance grant at enhanced EPSRC rates (�12,000 for 2005/06). The School of Computer Science also provides opportunities for research students to supplement their income by undertaking laboratory demonstrating and other teaching support work. Non EU students are eligible.
For further information contact the project supervisor, Dr Doug Edwards:
Douglas.Edwards@manchester.ac.uk or see:
http://www.cs.manchester.ac.uk/apt/projects/sedate/SedateStudentship.php and also http://www.cs.manchester.ac.uk/apt/projects/sedate/
Details of how to apply for this post are available online (including an online copy of the application form) at:
http://www.cs.manchester.ac.uk/Study_subweb/PhDWeb/PhDApplication.php
Please ensure that you mark clearly on your application form, under the 'Proposed Area of Research' section, that you are applying for 'Asynchronous Synthesis' with Dr. Doug Edwards as supervisor, or your application may not be considered for this studentship.